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ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
Data Sheet February 13, 2006 FN8093.0
5-Pin Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability
The ISL88011 - ISL88015 family of devices offer both fixed and/or adjustable voltage-monitoring that combine popular functions such as Power On Reset control, Watchdog Timer, Supply Voltage Supervision, and Manual Reset assertion in a small 5-pin SOT23 package. Unique features on the ISL88013 and ISL88015 include a watchdog timer with a 51sec startup timeout and a 1.6sec normal timeout duration. On the ISL88011 and ISL88014, users can increase the nominal 200ms Power On Reset timeout delay by adding an external capacitor to the CPOR pin. Both fixed and adjustable voltage monitors are provided by the ISL88012. Complementary active-low and active-high reset outputs are available on the ISL88011, ISL88012 and ISL88013 devices. All devices provide manual reset capability (see Product Features Table). Seven preprogrammed reset threshold voltages accurate to 1.5% over temperature are offered (see Ordering Information). The ISL88012, ISL88014 and ISL88015 have a user-adjustable voltage input available for custom monitoring of any voltage down to 0.6V. All parts are specifically designed for low power consumption and high threshold accuracy.
Features
* Single/Dual Voltage Monitoring Supervisors * Fixed-Voltage Options Allow Precise Monitoring of +2.5V, +3.0V, +3.3V, and +5.0V Power Supplies * Dual Supervisor Has One Fixed Voltage Input and Another That is User-Adjustable Down to 0.6V. * Both RST and RST Outputs Available * Adjustable POR Timeout Delay Options * Watchdog Timer With 1.6sec Normal and 51sec Startup Timeout Durations * Manual Reset Input on All Devices * Reset Signal Valid Down to VDD = 1V * Accurate 1.5% Voltage Threshold * Immune to Power-Supply Transients * Ultra Low 5.5A Supply Current * Small 5-pin SOT-23 Pb Free package * Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
* Process Control Systems * Intelligent Instruments * Embedded Control Systems * Computer Systems * Critical P and C Power Monitoring * Portable/Battery-Powered Equipment * PDA and Handheld PC Devices
Pinouts (ordering information on next page)
RST/MR 1 5 VDD RST/MR 1 5 VDD RST/MR 1 5 VDD
GND
2
ISL88011
GND
2
ISL88012
GND
2
ISL88013
RST
3
4
CPOR
RST
3
4
VMON
RST
3
4
WDI
RST/MR
1
5
VDD
RST/MR
1
5
VDD
GND
2
ISL88014
GND
2
ISL88015
VMON
3
4
CPOR
VMON
3
4
WDI
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Ordering Information
PART NUMBER (Notes 1, 2) ISL88011IH546Z ISL88011IH544Z ISL88011 ISL88011IH531Z ISL88011IH529Z ISL88011IH526Z ISL88011IH523Z ISL88011IH522Z ISL88012IH546Z ISL88012IH544Z ISL88012 ISL88012IH531Z ISL88012IH529Z ISL88012IH526Z ISL88012IH523Z ISL88012IH522Z ISL88013IH546Z ISL88013IH544Z ISL88013 ISL88013IH531Z ISL88013IH529Z ISL88013IH526Z ISL88013IH523Z ISL88013IH522Z ISL88014IH5Z ISL88015IH5Z NOTES: 1. Add "-TK" suffix for Tape and Reel 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. The voltage trip point can be adjusted to be greater than 0.6V using 2 external resistors. By default, the VTHVMON trip point is 0.6V if no external resistors are used. MARKING AGU AGV AGW AGX AGY AGZ AHE AHF AHG AHH AHI AHJ AHK AHL AHM AHN AHO AHP AHQ AHR AHS AHT AHU VTHVDD 4.64V 4.38V 3.09V 2.92V 2.63V 2.32V 2.19V 4.64V 4.38V 3.09V 2.92V 2.63V 2.32V 2.19V 4.64V 4.38V 3.09V 2.92V 2.63V 2.32V 2.19V N/A N/A VTHVMON N/A N/A N/A N/A N/A N/A N/A 0.6V (Note 3) 0.6V (Note 3) 0.6V (Note 3) 0.6V (Note 3) 0.6V (Note 3) 0.6V (Note 3) 0.6V (Note 3) N/A N/A N/A N/A N/A N/A N/A 0.6V (Note 3) 0.6V (Note 3) TEMPERATURE RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE (Pb-free) 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23 5 Ld SOT23
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Functional Block Diagrams
VDD RST/MR POR VTHMON VDD PB VTHMON VMON CPOR RST OSC VREF GND GND WDI WDT GND RST POR PB VTHMON OSC RST VDD RST/MR POR PB VDD RST/MR
ISL88011
VDD R1
ISL88012
VDD R1 RST/MR POR VTHMON VDD PB VMON R2 VTHMON OSC
ISL88013
RST/MR POR PB
VMON R2
CPOR
OSC GND WDI WDT GND
ISL88014
ISL88015
Product Features Table
FUNCTION Active-Low Reset (RST) Active-High Reset (RST) Watchdog Timer (WDI) Dual Voltage Supervision Adjustable POR Timeout (CPOR) Manual Reset Input (MR) Fixed Trip Point Voltage Adjustable Trip Point Voltage x x x x x x x x x x x x x x ISL88011 x x ISL88012 x x ISL88013 x x x x ISL88014 x ISL88015 x
Pin Descriptions
PIN ISL88011 1 2 ISL88012 1 2 4 3 4 4 5 5 5 5 3 3 4 4 5 ISL88013 1 2 ISL88014 1 2 3 ISL88015 1 2 3 NAME RST/MR GND VMON RST CPOR WDI VDD FUNCTION Combined Active-Low Reset Output and Manual Reset Input Ground Adjustable Threshold Voltage Input Active-High Reset Output Adjustable POR Timeout Delay Input Watchdog Timer Input Supply Voltage and Monitored Input
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ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
Absolute Maximum Ratings
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-40C to +125C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Voltage on any pin with respect to GND . . . . . . . . . . . . -1.0V to +7V D.C. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . 300C
Recommended Operating Conditions
Thermal Resistance (Typical, Note 4) JA (C/W) 5 Ld SOT-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300C (SOT-23 Lead Tips Only)
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . . .-40C to 85C Pull-up Resistance (RPU) . . . . . . . . . . . . . . . . . . . . . 5k to 100k
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
NOTE: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
SYMBOL VDD IDD Supply Voltage Range
Over the recommended operating conditions unless otherwise specified, RPU = 10k. TEST CONDITIONS VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 3.3V MIN 2.0 8 7 5.5 4.5 TYP MAX 5.5 11.5 10 9 8 100 100 ISL88011, 88012, 88013IH546 ISL88011, 88012, 88013IH544 ISL88011, 88012, 88013IH531 ISL88011, 88012, 88013IH529 ISL88011, 88012, 88013IH526 ISL88011, 88012, 88013IH523 ISL88011, 88012, 88013IH522 4.57 4.31 3.04 2.88 2.59 2.29 2.16 4.64 4.38 3.09 2.92 2.63 2.32 2.19 46 44 31 29 26 23 22 599 597 589 589 589 597 597 605 603 595 595 595 603 603 611 609 601 601 601 609 609 4.71 4.45 3.14 2.96 2.67 2.35 2.22 UNITS V A A A A nA nA V V V V V V V mV mV mV mV mV mV mV mV mV mV mV mV mV mV
PARAMETER Supply Current for ISL88011, ISL88012, ISL88013
Supply Current for ISL88014/15 ILI ILO VTHVDD Input Leakage Current (VMON) Output Leakage Current (VMON) Fixed VDD Voltage Trip Point
VOLTAGE THRESHOLDS
VTHVDD
HYST
Hysteresis at VDD Input
VTHVDD = 4.64V VTHVDD = 4.38V VTHVDD = 3.09V VTHVDD = 2.92V VTHVDD= 2.63V VTHVDD = 2.32V VTHVDD = 2.19V
VTHVMON Adj. Reset Voltage Trip Point (Note 5) VTHVDD = 4.64V VTHVDD = 4.38V VTHVDD = 3.09V VTHVDD = 2.92V VTHVDD= 2.63V VTHVDD = 2.32V VTHVDD = 2.19V
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
Electrical Specifications
SYMBOL Over the recommended operating conditions unless otherwise specified, RPU = 10k. (Continued) TEST CONDITIONS MIN TYP 3 MAX UNITS mV
PARAMETER
VTHVMON Hysteresis Voltage (Note 5) HYST RESET VOL VOH tRPD tPOR CLOAD VMR tMR Reset Output Voltage Low Reset Output Voltage High VTH to Reset Asserted Delay POR Timeout Delay Load Capacitance on Reset Pins MR Input Voltage MR Minimum Pulse Width 0 1 32 1.0 100 ISL88012, ISL88013, ISL88015 ISL88011, ISL88014 with CPOR = OPEN MANUAL RESET 140 200 VDD 3.3V, Sinking 0.5mA VDD < 3.3V, Sinking 0.5mA VDD 3.3V, Sourcing 0.4mA VDD < 3.3V, Sourcing 0.4mA VDD-0.6 VDD-0.6
0.05 0.05 VDD-0.4 VDD-0.4 6 200 250 5
0.40 0.40
V V V V s
260
ms ms pF
100
mV s
WATCHDOG TIMER (Note 6) Start tWDT Startup Watchdog Timeout Period tWDT tWDPS VIL VIH IWDT NOTES: 5. Applies to ISL88012, ISL88014, and ISL88015. 6. Applies to ISL88013 and ISL88015. Normal Watchdog Timeout Period WDI Minimum Pulse Width Watchdog Input Voltage Low Watchdog Input Voltage High Watchdog Input Current 0.85 x VDD 100 51 1.6 64 2.0 0.3 x VDD sec sec ns V V nA
Pin Description
RST
The push-pull RST output is set to VDD (HIGH) whenever 1) the device is first powered up, 2) either VDD or the voltage on VMON falls below their respective minimum voltage sense levels, 3) MR is asserted or 4) the watchdog timeout expires.
The device is designed with hysteresis to help prevent chattering due to noise. VMON The VMON pin on the ISL88012, ISL88014 and ISL88015 is a monitored input voltage that is user-adjustable. The voltage at this pin is compared against an internal 600mV reference voltage (VTHVMON) and a reset is asserted whenever the monitored voltage falls below this trip point.
RST/MR
This pin functions as both a reset output and a manual reset input. The RST output functions identically to the complementary RST output but is an open drain output that is pulled to GND (LOW) when reset is asserted. The MR input is an active-low debounced input to which a user can connect a push-button to add manual reset capability or drive with active low signal from a controller.
WDI
The Watchdog Input takes an input from a microprocessor and ensures that it periodically toggles the WDI pin, otherwise the internal watchdog timer runs out and reset is asserted. The internal Watchdog Timer is cleared whenever the WDI input pin sees a rising or falling edge or the device is manually reset.
VDD
The VDD pin is the power supply terminal. It is monitored by the ISL88011, ISL88012 and ISL88013. For these devices, the voltage at this pin is compared against an internal factory-programmed voltage trip point, VTHVDD. A reset is first asserted when the device is initially powered up to ensure that the power supply has stabilized. Thereafter, reset is again asserted whenever VDD falls below VTHVDD.
CPOR
The CPOR input pin lets users increase the Power On Reset timeout delay (tPOR) by connecting a capacitor between CPOR and ground. (See Figure 3)
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
VTHVDD VDD 1V
VTHVMON VMON >tMR
MR tPOR tRPD tPOR tRPD tPOR tPOR
RST
RST
FIGURE 1. VOLTAGE MONITORING TIMING DIAGRAM
Principles of Operation
The ISL88011 - ISL88015 devices provide those functions needed for critical voltage monitoring. These features include Power On Reset control, customizable supply voltage supervision, Watchdog Timer capability, and manual reset assertion. By integrating all of these features into a small 5-pin SOT23 package and using only 5.5A of supply current, the ISL88011 - ISL88015 devices can assist in lowering system cost, reducing board space requirements, and increasing the reliability of a system.
The ISL88012, ISL88014 and ISL88015 allow users to customize the minimum voltage sense level on the VMON input pin. To do this, connect an external resistor divider network to the VMON pin in order to set the trip point to some voltage above 600mV according to the following equation (See Figure 2): ( R1 + R2 ) V INTRIP = 0.6 x -------------------------R2
(EQ. 1)
Low Voltage Monitoring
During normal operation, these supervisors monitor both the voltage level of VDD (ISL88011,12,13) and/or VMON (ISL88012,14,15). The device asserts a reset if any of these voltages falls below their respective trip points. The reset signal effectively prevents the system from operating during a power failure or brownout condition. This reset signal remains asserted until VDD and the voltage on VMON exceed their voltage threshold setting for the reset time delay period tPOR of 200ms (See Figure 1).
R1 VIN
VMON
R2
ISL88012 ISL88014 ISL88015
FIGURE 2. USING VMON TO MONITOR VIN VIA RESISTORS
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ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
Power On Reset (POR)
Applying at least 1V to the VDD pin activates a POR circuit which asserts reset (i.e. RST goes HIGH while RST goes LOW). The reset signals remain asserted until the voltage at VDD and / or VMON rise above the minimum voltage sense level for time period tPOR. This ensures that the voltages have stabilized. These reset signals provide several benefits: * It prevents the system microprocessor from starting to operate with insufficient voltage. * It prevents the processor from operating prior to stabilization of the oscillator. * It ensures that the monitored device is held out of operation until internal registers are properly loaded. * It allows time for an FPGA to download its configuration prior to initialization of the circuit.
ISL88011 ISL88012 ISL88013 ISL88014 ISL88015 PB
Manual Reset
The manual reset input (MR) allows the user to trigger a reset by using a push-button switch. The MR input is an active-low debounced input. By connecting a push-button directly from MR to ground, the designer adds manual system reset capability (see Figure 4). Reset is asserted if the MR pin is pulled low to less than 100mV for 1s or longer while the push-button is closed. After MR is released, the reset outputs remain asserted for tPOR (200ms) and then released.
VDD
Rpu RST/MR
Adjusting POR Timeout via CPOR Pin
On the ISL88011 and ISL88014, users can adjust the Power On Reset timeout delay (tPOR) up to many times the normal tPOR of 250ms. To do this, connect a capacitor between CPOR and ground (see Figure 3). For example, connecting a 30pF capacitor to CPOR will increase tPOR from a typical 250ms to about 2.5sec. NOTE: Care should be taken in PCB layout and capacitor placement in order to reduce stray capacitance as much as possible, which lengthens the tPOR timeout period.
FIGURE 4. CONNECTING A MANUAL RESET PUSH-BUTTON
Watchdog Timer
The Watchdog Timer circuit checks microprocessor activity by monitoring the WDI input pin. The microprocessor must periodically toggle the WDI pin within tWDT (1.6sec nominal), otherwise the reset signal is asserted (see Figure 5). Internally, the 1.6sec timer is cleared by either a reset or by toggling the WDI input. Besides the 1.6sec default timeout during normal operation, these devices also have a longer 51sec timeout for startup. During this time, a reset cannot be asserted due to the WDI not being toggled. The longer delay at power-on allows an operating system to boot, an FPGA to initialize, or the system software to initialize without the burden of dealing with the Watchdog.
CPOR ISL88011 ISL88014
tPOR vs CPOR
6 5 4 tPOR (sec) 3 2 1 0 0 10 20 30 40 CPOR (pF) 50 60 70 80
Symbol Table
WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don't Care: Changes Allowed N/A OUTPUTS Will be steady Will change from LOW to HIGH Will change from HIGH to LOW Changing: State Not Known Center Line is High Impedance
FIGURE 3. ADJUSTING tPOR WITH A CAPACITOR
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
VTHVDD VDD
1V
START tWDT
< tWDT
< tWDT
STARTtWDT
tWDT WDI
>tWDPS
RST tPOR tPOR
RST
FIGURE 5. WATCHDOG TIMING DIAGRAM
Typical Application Circuits
12V 10K 12V 12V SUPPLY
180K
VDD VMON RST
100K
RESET
44K RST VDD 0.1F 10K RST PGOOD @ 10.8V PGOOD @ 10.8V
10K
4.7V ISL88014 / ISL88015 VTH @ 11.4V
ISL88011IH531Z
FIGURE 6. HIGH ACCURACY 12V SUPPLY MONITOR
12V 5V +5V
FIGURE 7. 12V SUPPLY PGOOD or PGOOD
100K 100K RST VTH @ 11.4V VMON RST VTH2 @ 4.4V 6.81K V2MON VDD RST -5V 100K
100K PGOOD
180K
VDD
100K
10K ISL88012
GND ISL88012IH546Z
-5V
PGOOD = HIGH IF -V < -4.6V AND -V + +V > 9.4 (abs)
FIGURE 8. MONITOR 5V AND 12V SUPPLIES
FIGURE 9. +5V AND -5V MONITOR
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Typical Application Circuits
3.3V VTHL @ 3.09V VDD RST
(Continued)
3.3V 100K PGOOD
50K
ISL8801X-31 3.3V VDD 100K RST
VTHH @ 3.6V
VMON
10K ISL88014 /ISL88015 VOLTAGE OUT OF RANGE = PGOOD LOW
FIGURE 10. OVER/UNDERVOLTAGE MONITOR
Applications: Using the ISL8801XEVAL1 Platform
The ISL8801XEVAL1 board is designed to provide both immediate functional assessment and flexibility to the user when evaluating any of the ISL88011 - ISL88015 variants (illustrated in Figure 11). It consists of two identical banks which each contain the five different pinouts available in this product family. The top bank comes populated for immediate assessment of functionality and performance. It is populated on the top row with the VTHVDD = 4.38V variants of the ISL88011, ISL88012 and ISL88013. The bottom row is populated with the ISL88014 and ISL88015, which monitor positive voltages >0.6V on the VMON input pin. The bottom bank is left unpopulated to allow other part options of the ISL88011, ISL88012 and ISL88013 to be evaluated with a minimal number of passive components to add. The RST/MR pull-up resistors are included as well as the ISL88014 and ISL88015 since these ICs have no voltage variants. During power-up, the ISL88011 - ISL88015 supervisors will assert reset once VDD reaches at least 1V. Thereafter, the ISL88011, ISL88012 and ISL88013 will release the reset once the VDD supply stays above 4.38V for the nominal tPOR period. The ISL88012, ISL88014 and ISL88015's VMON input pins are biased to trip at 10.7V, 1.93V and 1.2V respectively. Note that because the ISL88012 is a dual voltage supervisor, both of the respective minimum thresholds for the VDD and VMON inputs must be met before reset is released.
All of the parts have the TwinPinTM RST/MR, which combines the active-low reset output with a manual reset input. The push-button can be tested by simply driving this to <100mV above ground for at least 1s. For the ISL88011 and ISL88014, the POR timeout delay tPOR can be increased from the nominal 250ms by connecting a capacitor to the CPOR pin. A comparison can be made between the two as the ISL88014 has a 22pF capacitor on its CPOR pin while the ISL88011 CPOR is left open. The ISL88013 and ISL88015 have a WDI input pin, which is connects to a microprocessor or microcontroller. This input needs to be periodically toggled within 1sec to prevent the supervisor from asserting reset. The WDI test point on the ISL8801XEVAL1 board provides easy access to this input. Multiple IC configurations as shown in Figures 6 through 10 are easy to evaluate with this platform as each bank is isolated from the other, thereby making VDD voltages and GND references indepedent of each other. SPECIAL CONSIDERATIONS: Using good decoupling practices will prevent transients from causing unwanted resets (i.e. due to switching noises and short duration droops in the supply voltage). When using the CPOR pin, avoid stray capacitance during layout as much as possible in order to minimize its effect on the tPOR timing.
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 ISL8801XEVAL1 BOM (Bill Of Materials)
R1, R2, R7, R8, R9, R10, R15, R20, R21, R22, = 100k RST/MR Pull-up Resistors R11, R12 =10k ISL88015 VMON divider to monitor 1.2V R4 = 10k ISL88014 VMON divider lower R to monitor 1.93V R3 = 22k ISL88014 VMON divider upper R to monitor 1.93V R17 = 10.0k ISL88012 VMON divider lower R to monitor 10.7V R18 = 169k ISL88012 VMON divider upper R to monitor 10.7V C1, C2 = 1000nF Bias supply decoupling C3 = DNP CPOR open on ISL88011 C5 = 22pF CPOR cap on ISL88014 U1-U3 = ISL8801XIH544 (Variant noted on bd) U6-U8 = DNP (left open for any variant to be populated) U4, U9 = ISL88014 U5, U10 = ISL88015
FIGURE 11. ISL8801XEVAL1 SCHEMATIC AND PHOTOGRAPH
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FN8093.0 February 13, 2006
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Packaging Information
5-Lead SOT23 Package
0.0374 [0.95] REF. 0.0197 0.0138 0.50 0.35 2
0.1181 0.1024
3.00 2.60 (s)
0.0748 [1.90] REF. 0.1181 0.1024 3.00 2.80 1
0.0571 0.0354
1.45 0.90
0.0512 0.0354
1.30 0.90
0.0059 0.0000
0.15 0.00
(s)
0.0039 [0.10]
LEADFRAME THICKNESS
0.0689 0.0591
1.75 1.50
0.0080 0.0035
0.20 0.09
0.0098 [0.25] 0-10
GAUGE PLANE
MAX. (5)
0.0276 0.0197
0.70 0.50
0.0217 0.0138
0.55 0.35
1. DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS AND GATE BURRS SHALL NOT EXCEED 0.127 MM PER SIDE. 2. DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.127 MM PER SIDE. 3. DIE IS FACING UP FOR MOLD. DIE IS FACING DOWN FOR TRIM/FORM. 4. THIS PART IS COMPLIANT WITH EIAJ SPECIFICATION SC74A. 5. LEAD SPAN/STAND OFF HEIGHT/COPLANARITY ARE CONSIDERED AS SPECIAL CHARACTERISTIC. (S) 6. CONTROLLING DIMENSIONS IN INCHES. [mm]
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 11
FN8093.0 February 13, 2006

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